CAD4EM-RTL: CAD for EM Security through RTL Quantitative Assessment

@inproceedings{He2020,

title = {Design for EM Side-Channel Security through Quantitative Assessment of RTL Implementations},

author = {Jiaji He and Haocheng Ma and Xiaolong Guo and Yiqiang Zhao and Yier Jin },

url = {http://cadforassurance.org/wp-content/uploads/jiaji2020design.pdf},

doi = {10.1109/ASP-DAC47756.2020.9045426},

year  = {2020},

date = {2020-01-13},

booktitle = {2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC)},

pages = {62-67},

publisher = {IEEE},

address = {Beijing, China },

abstract = {Electromagnetic (EM) side-channel attacks aim at extracting secret information from cryptographic hardware implementations. Countermeasures have been proposed at the device level, register-transfer level (RTL), and layout level, though efficient, there are still requirements for quantitative assessment of the hardware implementations' resistance against EM side-channel attacks. In this paper, we propose a design for EM side-channel security evaluation and optimization framework based on the t-test evaluation results derived from RTL hardware implementations. Different implementations of the same cryptographic algorithm are evaluated under different hypothesis leakage models considering the driven capabilities of logic components, and the evaluation results are validated with side-channel attacks on FPGA platform. Experimental results prove the feasibility of the proposed side-channel leakage evaluation method at the pre-silicon stage. The remedies and suggested security design rules are also discussed.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}