CAD for Assurance of Electronic Systems


By: Shih-Yuan Yu (UC Irvine), Rozhin Yasaei (UC Irvine), and Mohammad Abdullah Al Faruque (UC Irvine)

Stage: RTL, Gate-Level


HW2VEC is an open-source graph learning tool available on GitHub that lowers the threshold for newcomers to research hardware security applications with graphs. HW2VEC provides an automated pipeline for extracting a graph representation from a hardware design in various abstraction levels (register transfer level or gate-level netlist). Besides, HW2VEC users can automatically transform the non-Euclidean hardware designs into Euclidean graph embeddings for solving their problems. HW2VEC can achieve state-of-the-art performance on two hardware security-related tasks: Hardware Trojan Detection and Intellectual Property Piracy Detection.

The time-to-market pressure and continuous growing complexity of hardware designs have promoted the globalization of the Integrated Circuit (IC) supply chain. However, such globalization also poses various security threats in each phase of the IC supply chain. Although the advancements of Machine Learning (ML) have pushed the frontier of hardware security, most conventional ML-based methods can only achieve the desired performance by manually finding a robust feature representation for circuits that are non-Euclidean data. As a result, modeling these circuits using graph learning to improve design flows has attracted research attention in the Electronic Design Automation (EDA) field. However, due to the lack of supporting tools, only a few existing works apply graph learning to resolve hardware security issues. Therefore, to attract more attention, we propose HW2VEC.


Shih-Yuan Yu

Input/Output Interface

  • Input: verilog or VHDL or gate-level netlist.
  • Output: graph of hardware designs, vectors, performance metrics.


python, pytorch, torch_geometric, pyverilog…

Licensing Info



Yasaei, Rozhin; Yu, Shih-Yuan; Faruque, Mohammad Abdullah Al

GNN4TJ: Graph Neural Networks for Hardware Trojan Detection at Register Transfer Level Proceedings Article

In: 2021 Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1504-1509, 2021, ISSN: 1558-1101.

Abstract | Links | BibTeX

-, Shih; Yasaei, Rozhin; Zhou, Qingrong; Nguyen, Tommy; Faruque, Mohammad Abdullah Al

HW2VEC: A Graph Learning Tool for Automating Hardware Security Journal Article

In: CoRR, vol. abs/2107.12328, 2021.

Abstract | Links | BibTeX

Moghaddas, Yasamin; Nguyen, Tommy; Yu, Shih-Yuan; Yasaei, Rozhin; Faruque, Mohammad Abdullah Al

Technical Report for HW2VEC -- A Graph Learning Tool for Automating Hardware Security Miscellaneous


Abstract | BibTeX

Yasaei, Rozhin; -, Shih; Naeini, Emad Kasaeyan; Faruque, Mohammad Abdullah Al

GNN4IP: Graph Neural Network for Hardware Intellectual Property Piracy Detection Journal Article

In: CoRR, vol. abs/2107.09130, 2021.

Abstract | Links | BibTeX