CAD for Assurance of Electronic Systems
 

CAD4EM-P: CAD for EM Security-Placement

By: Haocheng Ma and Yier Jin

Stage: Layout

Summary

  • CAD4EM-P considers security attributes in the IC design flow against EM side channel attacks.
  • The tool helps optimize the initial placement to maximize EM leakage deviation by navigating data-dependent register reallocation.
  • Initial results show that this tool can protect AES circuits against EM side channel attacks by reducing the maximum correlation up to 54.41%.

Contact

Yier Jin

Input/Output Interface

  • Input: Design files, i.e., rtl, design.place, design.lef, design.def and Timing constraint design.sdc
  • Output: Layout

References

Ma, Haocheng; He, Jiaji; Liu, Yanjiang; Zhao, Yiqiang; Jin, Yier

CAD4EM-P: Security-Driven Placement Tools for Electromagnetic Side Channel Protection Proceedings Article

In: 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), pp. 1-6, IEEE, Xi'an, P.R. China, 2019.

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