Stage: Gate-level (ASIC)
Over 2800 Trojan inserted variants across 16 different gate-level designs generated using TRIT (more info). Benchmarks are provided in Synopsys LEDA 250nm or Skywater 130nm.
Trojan benchmarks are available at the following links:
LEDA 250nm Standard Cell Library
Skywater 130nm Standard Cell Library
Frequently Asked Questions
A: Currently, we have Trojan inserted variants for ISCAS 85 and ISCAS 89 designs.
With LEDA 250nm standard cell library, we use the following:
- c2670, c3540, c5315, c6288, s1423, s13207, s15850, s35932
- s953, s1196, s1238, s1423, s1488, s5378, s9234, s38417, s38584
A: We currently have LEDA 250nm standard cell library and a modified version of Skywater 130nm (https://github.com/google/skywater-pdk). The Skywater 130nm library used is provided for all Trojan-inserted Skywater benchmarks. LEDA 250nm is an older, academic library from Synopsys. Please reach out to Synopsys for further inquiries on obtaining LEDA 250nm.
A: We currently have 2 main types of Trojan effects: Denial of Service (DoS) and Always on Leakage. DoS Trojans will flip an internal bit upon activation whereas as leakage Trojans will leak internal signal information through side-channel. We also have combinational and sequential variants for both DoS and leakage.
A: Each Trojan-inserted benchmark has a log file which contains information on what signals are used for the trigger condition and their activation values, what payload signals are leaked or perturbed, and the structure of the Trojan.
A: All Trojan triggers are verified via Synopsys TetraMAX using full-scan assumption or Cadence JasperGold with non-scan assumption. Trojans in sequential designs verified with JasperGold are guaranteed to be triggerable via the primary inputs. More information can be found in the paper referenced below.
A: Unfortunately, due to various IP related issues we cannot release the tool. Despite these hurdles, we plan to continually update this page with more Trojan-inserted benchmarks across diverse designs.
In: 2018 Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1598-1603, 2018, ISSN: 1558-1101.