By: Anirban Sengupta (IIT Indore) and Mahendra Rathor (IIT Indore)
Crypto-Stego tool simulates and analyses the functionality of crypto-based steganography approach for securing DSP hardware accelerators against piracy and false claim of ownership threats.
Objective of the tool: The left portion of the tool shows the panel for providing required inputs to the tool, right portion shows the panel with output buttons to see the intermediate and final outputs of the crypto-based steganography approach. The panel in the middle shows the status of the key-driven steps (i.e. state matrix formation, row diffusion, Trifid cipher, alphabet substitution and byte concatenation) of the crypto-based steganography approach. Initially, these status bars remain Red. Upon applying the stego-key, the respective status bar turns Blue. The Crypto-Stego tool accepts the DSP application input in the form CDFG along with module library and resource constraints. The tool shows all the intermediate steps of crypto-based steganography and the finally generated stego-constraints at the output. Further, it also shows scheduling and registers allocation pre and post embedded steganography constraints, onto the output window. The embedded steganography constraints in the hardware accelerator design can be used as digital evidence to secure against piracy and false claim of ownership threats.
- Text file of DFG representation of DSP application
- module library, resource constraints (i.e. # adders, multipliers etc.)
- stego-key1, stego-key2, stego-key3, stego-key4 and stego-key5
- constraints size
- Scheduled DFG pre-steganography
- register allocation table pre-steganography
- design cost pre-steganography
- scheduled DFG post-steganography
- register allocation table post-steganography
- design cost post-steganography phase-1
- design cost post-steganography phase-2
OS: Windows 10
Cryptography driven IP steganography for DSP Hardware Accelerators Book Forthcoming
Forthcoming, ISBN: 978-1-83953-306-8.
In: IEEE Access, vol. 8, pp. 6543-6565, 2020, ISSN: 2169-3536.
In: IEEE Letters of the Computer Society, vol. 3, no. 1, pp. 13-16, 2020, ISSN: 2573-9689.
In: IEEE Letters of the Computer Society, vol. 2, no. 4, pp. 32-35, 2019, ISSN: 2573-9689.
In: IEEE Transactions on Consumer Electronics, vol. 65, no. 4, pp. 506-515, 2019, ISSN: 1558-4127.
- Indian Institute of Technology Indore; Ministry of Electronics & Information Technology (MEitY) Govt. of India; Council of Industrial & Scientific Research (CSIR) -EMR Division