Faciometric Hardware Security Tool

By: Anirban Sengupta (IIT Indore), Mahendra Rathor (IIT Indore), and Himanshu Mishra (IIT Indore)

Stage: RTL

Summary

The Faciometric hardware security tool has been developed to simulate and analyze the functionality of facial biometric based approach for securing DSP hardware accelerators against piracy and false claim of ownership threats.
The left portion of the tool shows the panel for providing required inputs to the tool, right portion shows the panel with output buttons to see the intermediate and final outputs of the facial biometric based hardware security approach. The panel in the middle shows the status of the intermediate steps (i.e. capture facial biometric with required grid size, generate nodal points and facial features set, calculation of feature dimensions for selected features, facial signature generation and conversion to hardware security constraints) in generating hardware security constraints from a captured/input facial image. Initially, these status bars remain Red. Upon applying the inputs, the respective status bar turns Green. The Faciometric hardware security tool accepts the DSP application input in the form CDFG along with the resource constraints. The tool shows all the intermediate steps of facial biometric based hardware security approach and the finally generated facial signature and corresponding hardware security constraints at the output. Further, it also shows scheduling and registers allocation pre and post embedding facial signature constraints, onto the output window. The embedded facial signature in the hardware accelerator design can be used as a unique digital evidence to secure against piracy and false claim of ownership threats.

Contact

Anirban Sengupta

Input/Output Interface

• Input: Inputs: Input facial Image, Grid size, chosen facial features, target DSP application, resource constraints
• Output: Outputs: Facial Image with nodal points, Image with facial features, feature dimensions, facial signature in the form of digital template, Hardware security constraints, pre-embedding register allocation, pre-embedding scheduling, post-embedding register allocation, post-embedding scheduling.

Dependencies

Tool is developed for 64-bit machine. The associated executable files run on a 64-bit operating system. The jdk-16 is also another dependency.

References

@article{Sengupta2021Facial,

title = {Facial Biometric for Securing Hardware Accelerators},

author = {Anirban Sengupta and Mahendra Rathor},

doi = {10.1109/TVLSI.2020.3029245},

issn = {1557-9999},

year  = {2021},

date = {2021-01-01},

journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},

volume = {29},

number = {1},

pages = {112-123},

abstract = {This article presents a novel facial biometrics-based hardware security methodology to secure hardware accelerators [such as digital signal processing (DSP) and multimedia intellectual property (IP) cores] against ownership threats/IP piracy. In this approach, an IP vendor's facial biometrics is first converted into a corresponding facial signature representing digital template, followed by embedding facial signature's digital template into the design in the form of secret biometric constraints, thereby generating a secured hardware accelerator design. The results report the following qualitative and quantitative analysis of the proposed biometric fingerprint approach: 1) impact of five different facial biometrics constraints on probability of coincidence (Pc) metric (indicating strength of digital evidence). The proposed approach achieves a very low Pc value in the range of 1.54E-5 to 2.01E-5; 2) impact of different facial feature set of a facial biometric image on total number of generated secret constraints and Pc. As evident, for all facial feature sets implemented, Pc ranges between 3.31E-4 and 2.01E-5; and 3) comparative analysis of proposed approach with recent work, for different DSP applications and five different facial biometric images, in terms of Pc. As evident, the proposed approach achieves significantly lower Pc, compared with recent work.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

Acknowledgments

• Indian Institute of Technology Indore, India

Video Demonstration

Available at: http://www.anirban-sengupta.com/Hardware_Security_Tools.php