By: Yinghua Hu (University of Southern California), Yuke Zhang (University of Southern California), Kaixin Yang (University of Southern California), Dake Chen (University of Southern California), Peter A. Beerel (University of Southern California), and Pierluigi Nuzzo …
By: Michael Zuzak (University of Maryland, College Park) and Ankur Srivastava (University of Maryland, College Park) Stage: RTL, HDL Summary ObfusGEM is a comprehensive logic locking simulator designed to evaluate the supply-chain security of locked …
By: Hossein Miri Lavasani (Case Western Reserve University) and Soumyajit Mandal (University of Florida) Stage: IC Fabrication Summary DHIT (Defense of High-Speed Transceivers) uses waveform-level analog obfuscation to provide additional protection to ultra-high-speed I/O pins. …
By: Nils Albartus (Ruhr University Bochum), Max Hoffmann (Ruhr University Bochum), Sebastian Temem (Ruhr University Bochum), Leonid Azriel (Technion – Israel Institute of Technology, Haifa, Israel), and Christof Paar (Max Planck Institute for Security and …
By: Rakibul Hassan (George Mason University), Gaurav Kohle (UC Davis), Setareh Rafatirad (UC Davis), Houman Homayoun (UC Davis), and Sai Manoj Pudukotai Dinakarrao (George Mason University) Stage: Gate-Level Summary We propose a neural network-based cognitive …
By: Seetal Potluri (North Carolina State University) and Aydin Aysu (North Carolina State University) Stage: Gate-Level Summary SeqL locks scan-chains to ensure output corruption in the functional mode of operation. The resulting design is evaluated …
By: Dominik Sisejkovic (RWTH Aachen University), Farhad Merchant (RWTH Aachen University), Lennart M. Reimann (RWTH Aachen University), Harshit Srivastava (RWTH Aachen University), Ahmed Hallawa (RWTH Aachen University) and Rainer Leupers (RWTH Aachen University) Stage: RTL, …
By: Pranesh Santikellur (IIT Kharagpur) and Rajat Subhra Chakraborty (IIT Kharagpur) Stage: Attack tool Summary XOR Arbiter PUF (XOR APUF) have proven to be more robust to machine learning based modeling attacks.This tool implements tensor …
By: Chandan Karfa (IIT Guwahati) and Ramanuj Chouksey (IIT Guwahati) Stage: RTL Summary An attack on locked RTL generated by TAO a state-of-the-art RTL locking solution. Contact Chandan Karfa Ramanuj Chouksey Input/Output Interface Input: Locked …
By: Embedded Security Group, Max Planck Institute for Security and Privacy, Germany Stage: Gate-Level Summary HAL [/hel/] is a comprehensive netlist reverse engineering and manipulation framework. Virtually all available research on netlist analysis operates on …